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4-4 Chapter 4: BIOS setup
5. The utility returns to the DOS prompt after the BIOS update process is
completed. Reboot the system from the hard disk drive.
A:\>afudos /iK8N-LR.ROM /pbnc
AMI Firmware Update Utility - Version 1.19(ASUS V2.07(03.11.24BB))
Copyright (C) 2002 American Megatrends, Inc. All rights reserved.
WARNING!! Do not turn off power during flash BIOS
Reading file ....... done
Reading flash ...... done
Advance Check ......
Erasing flash ...... done
Writing flash ...... 0x0008CC00 (9%)
4. The utility verifies the file and starts updating the BIOS.
Do not shut down or reset the system while updating the BIOS to
prevent system boot failure!
A:\>afudos /iK8N-LR.ROM /pbnc
AMI Firmware Update Utility - Version 1.19(ASUS V2.07(03.11.24BB))
Copyright (C) 2002 American Megatrends, Inc. All rights reserved.
WARNING!! Do not turn off power during flash BIOS
Reading file ....... done
Reading flash ...... done
Advance Check ......
Erasing flash ...... done
Writing flash ...... done
Verifying flash .... done
Please restart your computer
A:\>
- Motherboard 1
- First Edition 2
- January 2006 2
- Contents 3
- Safety information 8
- About this guide 9
- Typography 10
- K8N-LR specifications summary 11
- Product 13
- 1.1 Welcome! 15
- 1.2 Package contents 15
- 1.3 Special features 16
- CrashFree BIOS 2 17
- ASUS MyLogo2™ 17
- Hardware 19
- 2.1 Before you proceed 21
- 2.2 Motherboard overview 22
- 2.2.3 Motherboard layout 23
- 2.2.5 Layout Contents 24
- ASUS K8N-LR 2-5 25
- 2.3.2 Installing the CPU 26
- 2.3.1 Overview 26
- ASUS K8N-LR 2-7 27
- Retention Module Base 28
- CPU Heatsink 28
- CPU_FAN2 30
- CPU_FAN1 30
- Rotation 30
- 2.4 System memory 31
- 2.4.4 Removing a DIMM 32
- 2.4.3 Installing a DIMM 32
- 2.5 Expansion slots 33
- 2.5.3 Interrupt assignments 34
- 2.5.4 PCI Express x16 slot 34
- 2.5.5 PCI/PCI-X slots 35
- (Default) 36
- Clear CMOS 36
- ASUS K8N-LR 2-17 37
- K8N-LR Keyboard Power Setting 37
- K8N-LR LAN_EN2 Setting 38
- BIOS recovery 39
- ACT/LINK 40
- 2.7.2 Internal connectors 41
- K8N-LR SATA Connectors 42
- For Power Supply 45
- Power Connector 45
- 24-pin Power Connector 45
- ASUS K8N-LR 2-27 47
- AUX_PANEL1 47
- Powering up 49
- ASUS K8N-LR 3-1 51
- 3-2 Chapter 3: Powering up 52
- BIOS setup 53
- DOS environment 55
- XP environment 55
- A:\>afudos /oOLDBIOS1.rom 56
- Updating the BIOS file 57
- 4-4 Chapter 4: BIOS setup 58
- 4.1.4 ASUS Update utility 61
- 4-8 Chapter 4: BIOS setup 62
- 4.2 BIOS setup program 64
- 4.2.2 Menu bar 65
- 4.2.3 Navigation keys 65
- 4.2.1 BIOS menu screen 65
- 4-12 Chapter 4: BIOS setup 66
- 4.3 Main menu 67
- Type [Auto] 68
- LBA/Large Mode [Auto] 68
- 4.3.5 IDE Configuration 69
- Configuration nVidia RAID ROM 70
- RAID Option ROM [Disabled] 70
- Disable/Enable nVidia 70
- 4.3.6 System Information 71
- 4.4 Advanced menu 72
- 4.4.2 Chipset 73
- Memory Configuration 74
- ECC Configuration 75
- SouthBridge Configuration 76
- Serial Port2 Mode [Normal] 77
- Parallel Port Address [378] 78
- Parallel Port Mode [Normal] 78
- Onboard BCM5721 LAN [Enabled] 78
- 4.4.4 PCI PnP 79
- 4.4.5 MPS Configuration 80
- ASUS K8N-LR 4-27 81
- 4.4.7 USB Configuration 82
- Cool ʻNʼ Quiet [Enabled] 83
- Hyper Transport Configuration 83
- CPU HT Link Speed [Auto] 83
- CPU HT Link Width [Auto] 83
- 4.5 Power menu 84
- 4.5.4 APM Configuration 85
- RTC Resume [Disabled] 86
- 4.5.5 Hardware Monitor 87
- 4.6 Boot menu 88
- ASUS K8N-LR 4-35 89
- 4.6.3 Security 90
- Change User Password 91
- Exit Options 92
- Exit & Save Changes 92
- Exit & Discard Changes 92
- Discard Changes 92
- Load Setup Defaults 92
- 4-40 Chapter 4: BIOS setup 94
- 5.1 Setting up RAID 97
- 5.2 NVIDIA 99
- RAID configurations 99
- 5.2.2 Entering the NVIDIA 100
- RAID Utility 100
- ASUS K8N-LR 5-5 101
- ASUS K8N-LR 5-7 103
- 5.2.5 Rebuilding a RAID set 104
- 5.2.6 Deleting a RAID array 105
- 5.2.7 Clearing the disk data 106
- Chapter summary 108
- 6.1 RAID driver installation 109
- 6.2 LAN driver installation 111
- 6.3 Support CD information 112
- 6.3.2 Drivers menu 113
- 6.3.3 Management Software 114
- 6.3.4 Utilities 115
- Reference information 117
- Appendix summary 118
- A.1 K8N-LR block diagram 119
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