Asus FrontLinker Technical Information download pdf (Page 104)

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

 





Advanced Chipset Settings

Congure DRAM Timing by SPD [Enabled]

DRAM ECC Mode [Disabled]

Hyper Path 3 [Auto]

DRAM Throttling Threshold [Auto]

Boot Graphic Adapter Priority [PCI Express/PCI]

PEG Buffer Length [Auto]

Link Latency [Auto]

PEG Root Control [Auto]

PEG Link Mode [Auto]

Slot Power [Auto]

Enable or Disable

Congure DRAM

Timing by SPD.





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

































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