2-17
華碩 H81I-PLUS 主機板使用手冊
RTL IOL control
DRAM RTL (CHA) [Auto]
設定值有:[Auto] [1 DRAM Clock] - [63 DRAM Clock]
DRAM RTL (CHB) [Auto]
設定值有:[Auto] [1 DRAM Clock] - [63 DRAM Clock]
DRAM IO-L (CHA) [Auto]
設定值有:[Auto] [Delay 1 Clock] - [Delay 15 Clock]
DRAM IO-L (CHB) [Auto]
設定值有:[Auto] [Delay 1 Clock] - [Delay 15 Clock]
Third Timings
tRDRD [Auto]
設定值有:[Auto] [1 DRAM Clock] – [7 DRAM Clock]
tRDRD_dr [Auto]
設定值有:[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tRDRD_dd [Auto]
設定值有:[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRRD [Auto]
設定值有:[Auto] [1 DRAM Clock] – [63 DRAM Clock]
tWRRD_dr [Auto]
設定值有:[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRRD_dd [Auto]
設定值有:[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRWR [Auto]
設定值有:[Auto] [1 DRAM Clock] – [7 DRAM Clock]
tWRWR_dr [Auto]
設定值有:[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRWR_dd [Auto]
設定值有:[Auto] [1 DRAM Clock] – [15 DRAM Clock]
Dec_WRD
設定值有:[Auto] [0] [1]
tRDWR [Auto]
設定值有:[Auto] [1 DRAM Clock] – [31 DRAM Clock]
tRDWR_dr [Auto]
設定值有:[Auto] [1 DRAM Clock] – [31 DRAM Clock]
tRDWR_dd [Auto]
設定值有:[Auto] [1 DRAM Clock] – [31 DRAM Clock]
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