Asus Maximus II Gene Specifications Page 101

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ASUS MAXIMUS VII GENE
3-17
Chapter 3
CPU Power Duty Control [T.Probe]
DIGI + VRM Duty Control adjusts the current of every VRM phase and the thermal
conditions of every phase component.
[T. Probe] Select to set the VRM thermal balance mode.
[Extreme] Select to set the VRM current balance mode.
DO NOT remove the thermal module. The thermal conditions should be monitored.
CPU Current Capability [Auto]
This item provides a total power range for CPU overclocking. A higher value setting
provides higher power consumption delivery and extends the overclocking frequency
range simultaneously.
Conguration options: [Auto] [100%] [110%] [120%] [130%] [140%]
CPU Input Boot Voltage [Auto]
VCCIN for the CPU right at boot. Conguration options: [Auto] [0.800] – [2.440V]
Tweakers’ Paradise
The subitems in this menu allow you to set the CPU ratio and features.
BCLK Tuning
VCCIN Shadow Voltage [Auto]
Pseudo Voltage for VCCIN. Conguration options: [Auto] [0.800] – [2.440V]
Termination Anti-Aliasing [Auto]
Termination Anti-Aliasing can be enabled to smooth out the change of the PLL
Termination Voltage, which may sometimes help to yield a better O.C. result.
Conguration options: [Auto] [Disabled] [Enabled]
Initial PLL Termination Voltage [Auto]
Initial Voltage at which CPU BCLKs are terminated. Maintaining a level close to CPU
Input Voltage will help BCLK Overclock.
Conguration options: [Auto] [0.0000] - [3.0000]
PLL Termination Reset Voltage [Auto]
PLL Termination Reset Voltage. Conguration options: [Auto] [0.0000] - [3.0000]
Eventual PLL Termination Voltage [Auto]
Eventual PLL Termination Voltage. Conguration options: [Auto] [0.0000] - [3.0000]
PCH ICC Voltage [Auto]
Power Supply for the Integrated Clock Controller. Lower may be better.
Clock Crossing Boot Voltage [Auto]
The instantaneous voltage value when the rising edge of BCLK DN is equal to the
falling edge of the BCLK DP.
Clock Crossing Reset Voltage [Auto]
The instantaneous voltage value when the rising edge of BCLK DN is equal to the
falling edge of the BCLK DP.
Clock Crossing Voltage [Auto]
The instantaneous voltage value when the rising edge of BCLK DN is equal to the
falling edge of the BCLK DP.
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