Asus Pentium 4 1U Rackmount Server AP160R-S User's Guide download pdf (Page 88)

5-22 Chapter 5: BIOS setup

Congure DRAM Timing by SPD [Enabled]

When this item is enabled, the DRAM timing parameters are set according to

the DRAM SPD (Serial Presence Detect). When disabled, you can manually

set the DRAM timing parameters through the DRAM sub-items. The following

sub-items appear when this item is Disabled.

Conguration options: [Disabled] [Enabled]

DRAM CAS# Latency [5]

Controls the latency between the SDRAM read command and the time the data

actually becomes available. Conguration options: [5] [4] [3]

DRAM RAS# to CAS# Delay [6 DRAM Clocks]

Controls the latency between the DDR SDRAM active command and the read/write

command.

Conguration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks]

[5 DRAM Clocks] [6 DRAM Clocks]

DRAM RAS# Precharge [6 DRAM Clocks]

Controls the idle clocks after issuing a precharge command to the DDR SDRAM.

Conguration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks]

[5 DRAM Clocks] [6 DRAM Clocks]

DRAM RAS# Activate to Precha [15 DRAM Clocks]

Conguration options: [4 DRAM Clocks] [5 DRAM Clocks] ~ [15 DRAM Clocks]

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Asus Pentium 4 1U Rackmount Server AP160R-S User's Guide Page 88